软件学院

School Of Software

Introduction:

Contact:

Name:Yangdong Deng

Email: dengyd@tsinghua.edu.cn

Phone: +86-10-62771733


Education background:

Ph.D. Department of Electrical and Computer Engineering, Carnegie Mellon University,Pittsburgh, USA, December 2006

Master of Engineering Department of Electronic Engineering, Tsinghua University, Beijing, April 1998

Bachelor of Engineering Department of Electronic Engineering, Tsinghua University, Beijing, July 1995


Experience:

Associate Professor Institute of Microelectronics, Tsinghua University, Beijing Mar’08 – present

Software architect Magma Design Automation Mar’06 - Mar’08

Senior Software Engineer  Incentia Design Automation May’04 - Mar’06

 


Research Status:

Ongoing Research Projects

Railway vehicle-borne embedded systems  Joint project with China CNR Corporation, 2012 – present

Parallel computer architecture for ray-tracing China National Science Foundation, 2012 - 2016

Essential microarchitectural and algorithmic

techniques for ray-tracing Tsinghua Independent Research Project, 2012 - 2015


Honors And Awards:

Best paper award, International Conference on Computer Design, 2013

NVIDIA Partner Professor Award, 2010, 2009

Foundation for Key Faculty Members, Tsinghua University, 2008

DengFeng Foundation, 2008

NEC Project Technical Achievement Award, Magma Design Automation, 2006


Academic Achievement:

Invited Talks and Lectures

 Massively Parallel Logic Simulation on Modern GPUs, Synopsys, Shanghai, 2012

 Hardware/Software Co-Design for System-on-Chips, China Computer Federation CCF AdvancedDisciplines Lectures, 2011.

 Massively Parallel Logic Simulation, GPU Technology Conference, 2012

 Morphing GPU into a Network Processor, GPU Technology Conference. 2011.

 Parallel Simulation on Heterogeneous Processors, 1st CAPS GPU Computing Workshop, 2011.

 Parallel Processing on Modern Many-Core Processors, Tilera Workshop, 2011

 Into a Parallel New World, Keynote Speech, GPU Technology Conference at Taiwan, 2011

 General Purpose Computing with Modern GPUs, NVIDIA CUDA Technology Lecture Series at10 top China Universities, 2009-2010

Professional Activities

 Invited course expert and editor “Parallel Programing for Many-Core Processors”, China ExcellentCourse Center, 2010 – present

 NVIDIA Partner Professor www.nvidia.com/object/professor_partners_bios_yangdong.html

 Co-chair Int’l Workshop on Frontier of GPU Computing, 2010, 2011, 2012

 Guest editor VLSI Design Journal, Jan. 2012

 Technical program committee IEEE Computer Society Annual Symposium onVLSI (2009-present), HPC China (2013), ASP-DAC(2012),ACM International Workshop on Timing Issues in the Specification andSynthesis of Digital Systems (2010), IEEE/ACM Great Lakes Symposium on VLSI (2010)

Publications

Books

1. Y. Deng and X. Xie, “Designing ARM based System-on-Chip”, Elsevier Publishing Company, in press.

2. Y. Deng, H. Chen, and Y. Liu, “Parallel Programing for Many-Core Processors,” HigherEducation Publishing House, in press.

3. Y. Deng and W. Maly, “3-D VLSI – A 2.5-D Integration Scheme,” Springer Verlag/TsinghuaUniversity Publishing House, 2010.

4. Z. Wang and Y. Deng, “Structural VLSI Design and High Level Synthesis,” Tsinghua PublishingHouse, 1998.

Invited Survey Papers

1. Yangdong Deng, Shuai Mu, “A Survey on GPU Based Electronic Design Automation Computing,” Invited Paper, Foundation and Trends in Electronics Design Automation, Now Publishers, 2013, pp. 1-180.

2. Y. Deng, D. Wang, and Y. Zhu, “Asynchronous Parallel Logic Simulation on Modern Graphics Processors,” Why Scientists and Engineers Need GPUs, Springer, 2012.

3. Y. Deng,“Hardware/Software Co-Design for System-on-Chips,” Communications of China Computer Federation, Feb. 2012.

4. Y. Deng, "GPU Accelerated VLSI Design Verification," Invited paper, First InternationalWorkshop on Frontier of GPU Computing, Jun. 2010.

Refereed Conference Papers (since 2008)

1. T. Wang and Y. Deng, “Mining Effective Parallelism from Hidden Coherence for GPU Based Path Tracing,” SIGGRAPH Asia, 2013.

2. K. Fang, Y. Ni, J. He, Z. Li, S. Mu, and Y. Deng, “FastLane: An FPGA Accelerated GPU Microarchitecture Simulator,”IEEE International Conference on Computer Design, 2013. (Best paper award)

3. H. Qian and Y. Deng, “Accelerating RTL Simulation with GPUs,” IEEE/ACM InternationalConference on Computer-Aided Design, Nov. 2011.

4. Y. Zhu, Y. Deng, and Y. Chen, “Hermes: An Integrated CPU/GPU Microarchitecture for IPRouting,” Design Automation Conference, 2011.

5. S. Mu, C. Wang, M. Liu, D. Li, M. Zhu, X. Chen, X. Xie, and Y. Deng, “Evaluating the Potential of Graphics Processors for High Performance Embedded Computing,” Design Automation and Test Europe, 2011.

6. K. Kang, and Y. Deng, “Scalable Packet Classification via GPU Meta-programming,” Design Automation and Test Europe, 2011.

7. J. Zhao, X. Zhang, X. Wang, Y. Deng, and X. Fu, “Exploiting Graphics Processors forHigh-performance IP Lookup in Software Routers,” INFOCOM, 2011.

8. B. Wang, Y. Zhu, and Y. Deng, “Distributed Time, Conservative Parallel Logic Simulation onGPUs,” Design Automation Conference, Jun. 2010.

9. Y. Deng, “GPU Accelerated VLSI Design Verification,” First International Workshop on Frontierof GPU Computing, Jun. 2010.

10. J. Xue, X. Jiao, Y. Deng, H. Qian, D. Zeng, G. Li, and Z. Yu, "Massively Parallel Finite ElementSimulator for Full-Chip STI Stress Analysis," First International Workshop on Frontier of GPUComputing, Jun. 2010.

11. S. Mu, J. Lu, N. Zhang, X. Zhang, Y. Deng, and S. Zhang, “IP Routing Processing with GraphicProcessors,” Design Automation and Test Europe, Apr. 2010.

12. Y. Deng, B. Wang, and S. Mu, “Taming Irregular EDA Applications on GPUs,” IEEE/ACMInternational Conference on Computer-Aided Design, Nov. 2009.

13. J. Xue, L. Yang, Y. Deng, Z. Ye, and Z. Yu, "Layout-Dependent STI Stress Analysis andStress-Aware RF/Analog Circuit Design Optimization," IEEE/ACM International Conference onComputer-Aided Design, Nov. 2009.

Refereed Journal Papers

1. S. Mu, Y. Deng, et. al. “Orchestrating Cache Management and Memory Scheduling for GPGPU Applications”, IEEE Transaction on Very Large Scale Integration, accepted.

2. Shuai Mu, Y. Deng, et. al. “Exploiting the Task-Pipelined Parallelism of Stream Programs on Many-Core GPUs” IEICE Transaction on Information and System, accepted.

3. H. Qian, Y. Deng, B. Wang, and S. Mu, “Towards Accelerating Irregular EDA Applications withGPUs,” Integration, the VLSI Journal, 2012.

4. J. Xue, Y. Deng, Z. Ye,et al. “A Framework for Layout-Dependent STI Stress Analysis and Stress-Aware Circuit Optimization,” IEEE Transaction on Very Large Scale Integration, Mar. 2012.

5. G. Sun, S. Xu, X. Wang, D. Wang, E. Tang. Y. Deng, and S. Chen, “A High-throughput,High-Accuracy System-Level Simulation Framework for System-on-Chips,” VLSI DesignJournal, Jan. 2012.

6. Y. Zhu, B. Wang, and Y. Deng, “Massively Parallel Logic Simulation with GPUs,” ACMTransaction on Design Automation of Electronics Systems, Vol.16, No.3, June, 2011.

7. X. Chen, Y. Deng, X. Chen, X. Li, and J. Tian, “GPU Based High Speed FIR Digital Filtering,”Journal on Computer Aided Design and Graphics, Sep. 2010.

8. J. Xue, T. Li, Y. Deng, and Z. Yu, “Full-Chip Leakage Verification for 65nm CMOS Node andBeyond,” Integration, the VLSI Journal, Sep., 2010.

9. Y. Deng and P. Li, “Temperature-Aware Floorplanning of 3-D ICs Considering ThermalDependent Leakage Power,” Journal of Low Power Electronics, Aug. 2006.

10. Y. Deng and W. Maly, “2.5-Dimensional VLSI System Integration,” IEEE Transaction on VLSI,Aug., 2005.